A battery charging circuit senses charging current using a sense circuit that includes a time-averaging amplifier circuit that nulls amplifier offset errors from the sensed current signal. With such offset correction, the sense circuit provides accurate current sensing over a wide dynamic range of charging current and thus may be used for low and high charging currents, and accurate detection of trickle and end-of-charge currents. The substantial elimination of amplifier-offset errors from charging current sensing permits use of a single sense resistor over a wide range of charging currents. Such accurate current detection supports zero-current regulation of the battery, which allows the battery to remain connected to the charging circuit even after reaching its end-of-charge condition. The battery charging circuit further may include digital switchover circuitry, which reduces charging control discontinuities by allowing both current and voltage feedback loops to drive the same regulation control circuit.
Claim
What is claimed is: 1. A battery charging circuit comprising a sense circuit that includes a time-averaging amplifier circuit to accurately sense a charging current of a battery under charge, said time-averaging amplifier circuit comprising a polarity-switched amplifier that periodically switches amplifier signal polarities to null amplifier offset errors from the sensed charging current. 2. The battery charging circuit of claim 1, wherein the battery charging circuit further comprises a charging control circuit coupled to the sense circuit, and wherein the charging control circuit includes a pass control circuit to control the charging current of the battery. 3. The battery charging circuit of claim 2, wherein the charging control circuit further comprises a digital switchover circuit to drive the pass control circuit with a first feedback signal in a constant-current (CC) charging mode and to drive the pass control circuit with a second feedback signal in constant-voltage (CV) charging mode, said first feedback signal derived from the sense signal and said second feedback signal derived from a charging voltage of the battery. 4. The battery charging circuit of claim 3, wherein the digital switchover circuit includes one or more pass control switches to selectively couple the first feedback signal to the pass control circuit in the CC charging mode, and to selectively couple the second feedback signal to the pass control circuit in the CV charging mode. 5. The battery charging circuit of claim 3, wherein the digital switchover circuit includes a mode control circuit to select between the CC and CV charging modes. 6.
Start up noise in a class D amplifier--is corrected by adding an analog switch S1 to the integrator circuit A1. A resistor R3 in the feedback path of A1 prevents A1 from saturating. In an alternate embodiment silent start switch connects a variable resistance to the comparator input. The resistance gradually increases.
Method And Apparatus For Voltage Regulation In Multi-Output Switched Mode Power Supplies
A step-down switched-mode power supply circuit includes a transformer having at least one primary winding and at least one secondary winding, a current sensing device for sensing a current through a primary winding of the transformer, a first switch and a second switch, a first comparator for determining if the current through the current sensing device exceeds a threshold, a voltage regulator coupled to the secondary winding to produce a regulated voltage, a second comparator for determining if the regulated voltage has drooped below an acceptable level, a counter coupled to the second comparator for generating a signal having a fixed number of switch cycles, and control circuitry for generating signals controlling the first switch and the second switch and responsive to the first comparator to enter a power saving mode disabling the signals, and to the second comparator to temporarily exit the power saving mode for a fixed number of cycles when the regulated voltage has drooped below an acceptable level.
Method And Apparatus For Pulse Frequency Modulation With Discontinuous Voltage Sensing
Exemplary embodiments may include a method of applying a charging pulse to an output capacitor, detecting satisfaction of a charging threshold, ending the charging pulse in response to the detecting the satisfaction of the charging threshold, and discharging the sampling capacitor in response to the detecting the satisfaction of the charging threshold. In some embodiments, once a sampling capacitor voltage drops below a discharging threshold, a charging pulse is applied. Exemplary embodiments may also include an apparatus with a controller coupled to an input node, a timer coupled to the controller, an inductive charger coupled to the controller, to an input node, and to an output node, and a sensor coupled to the controller and the output node. Exemplary embodiments may further include an apparatus where a sensor with a sampling capacitor has a first terminal coupled to the output node and a second terminal coupled to the controller and the inductive charger.
Method And Apparatus For Virtual Current Sensing In Dc-Dc Switched Mode Power Supplies
An apparatus and method for virtual current sensing in a DC-DC switched mode power supply. In a fixed frequency implementation, when a switching phase begins, the phase node goes high when the high-side switching transistor is turned on. At this point, a first programmable current source begins charging a current sensing capacitor and the voltage across the capacitor simulates the rising slope of the voltage across a conventional current sensing resistor. Simultaneously, a ramp capacitor beginning at a reference voltage is charged by a second programmable current source. When the sum of the voltages across the two capacitors exceeds an error voltage, the phase node goes low when the drive signal to the transistor is turned off. At this point, a third programmable current source begins discharging the current sensing capacitor and the voltage across the capacitor simulates the falling slope of the current across the conventional resistor.
Claim
What is claimed is: 1. An apparatus for determining a current through an output inductor in a switching regulator, comprising: a first current source activated at the beginning of a switching cycle for charging a current sensing capacitor at a rate proportional to the current through said output inductor; a second current source reset to a reference voltage at the beginning of said switching cycle for charging a ramp capacitor; a third current source for discharging said current sensing capacitor at a rate proportional to said current through said output inductor, wherein the voltage across said current sensing capacitor is reset to said reference voltage at the end of the duty cycle of said switching cycle; and a summing node for generating a current ramp proportional to said current through said output inductor. 2. The apparatus of claim 1, further comprising a comparator for comparing said current ramp to an error voltage generated by an error amplifier. 3. The apparatus of claim 1, wherein said first current source, said second current source, and said third current sources are transconductance amplifiers. 4.
Low Voltage Dc-To-Dc Power Converter Integrated Circuit And Related Methods
A dc-to-dc converter circuit for generating an output voltage from a source voltage includes a plurality of first metal oxide semiconductor field effect transistors (MOSFETs) connected in parallel and collectively defining a gate, a source and a drain. A driver circuit preferably includes a bipolar transistor connected to the gate for turning on the first MOSFETs. A second MOSFET is preferably connected to the gate for turning off the plurality of first MOSFETs. The dc-to-dc converter also preferably includes a clamp circuit connected to the plurality of first MOSFETs across the drain and source thereof. Protection, soft-start and status features are also preferably incorporated into the dc-to-dc converter. A voltage divider is connected to a reference voltage for dividing a first reference voltage to thereby generate a second reference voltage less than a desired output voltage. An error amplifier is connected to the voltage divider for generating an error signal based upon a difference between the second reference voltage and an actual output voltage.
Method And Apparatus For Voltage Regulation In Multi-Output Switched Mode Power Supplies
A step-down switched-mode power supply circuit includes a transformer having at least one primary winding and at least one secondary winding, a current sensing device for sensing a current through a primary winding of the transformer, a first switch and a second switch, a first comparator for determining if the current through the current sensing device exceeds a threshold, a voltage regulator coupled to the secondary winding to produce a regulated voltage, a second comparator for determining if the regulated voltage has drooped below an acceptable level, a counter coupled to the second comparator for generating a signal having a fixed number of switch cycles, and control circuitry for generating signals controlling the first switch and the second switch and responsive to the first comparator to enter a power saving mode disabling the signals, and to the second comparator to temporarily exit the power saving mode for a fixed number of cycles when the regulated voltage has drooped below an acceptable level.
The present disclosure presents a circuit, method, and system for dynamically determining optimal deadtime values in a DC-DC converter power stage while operating the circuit under controlled conditions during a test/trim routine. The determined optimal deadtime values are stored in non-volatile memory. The optimal deadtime values are used as fixed settings during normal PWM operation. On start-up, the optimal, fixed deadtime values are loaded into the deadtime circuits of the driver and used during normal PWM operation of the DC-DC converter power stage circuit.
Switched Mode Power Supply Having Variable Minimum Switching Frequency
Application
#7471072 Dec 30, 2008
Filed
Oct 16, 2006
Inventor
John Kenneth Fogg (Cary, NC) ·
Yin-Chih Yang (Taipei, TW)
Appl. No.
11/549744
Assignee
Semtech Corporation (Morrisville, NC)
International Classification
G05F 1/575, G05F 1/618
U.S. Classification
323284, 323285
Abstract
In a switched mode power supply (SMPS) then selectively operates in continuous current mode (CCM) and discontinuous current mode (DCM), the minimum switching frequency of the SMPS is adjusted by setting a minimum duration for DCM operation. A resistance value applied to an external pin of the SMPS controls the duration of a timer that is reset in CCM and activated upon entering DCM. Upon expiration of the variable duration, the SMPS reverts to CCM for at least one switching cycle. This allows the SMPS minimum effective switching frequency to be set, for each application in which the SMPS is deployed, at a level that avoids audible noise (but which may be lower than an ultrasonic frequency), thus taking maximum advantage of the efficiencies of DCM operation under light load conditions.
Method And Apparatus For Constant On-Time Switch Mode Converters
Application
#7714547 May 11, 2010
Filed
Aug 8, 2008
Inventor
John Kenneth Fogg (Cary, NC) ·
Pankaj Kashikar (Raleigh, NC)
Appl. No.
12/188613
Assignee
SEMTECH Corporation (Morrisville, NC)
International Classification
G05F 1/70
U.S. Classification
323224, 323283
Abstract
The teachings presented herein provide a method and apparatus for operating constant on-time DC/DC converters, including pseudo constant on-time variants, with a virtual current-mode slope signal. Use of the slope signal provides, among other advantages and improvements, greater noise immunity and the ability to operate with a wider range of converter output filters. More particularly, incorporating a properly synchronized slope signal into the on-time triggering comparison provides for a maximum slope offset at on-time triggering. Doing so prevent double-pulsing (i. e. , erroneous on-time retriggering) and other undesirable behavior of conventional constant on-time DC/DC converters and, as a particular but non-limiting advantage, allows ready and advantageous use of the slope-compensated converter as taught herein with low ESR capacitors in the output filter.
A dual comparator pwm audio amplifier has a differential-to-single ended feedback amplifier 40 coupled to an integrating amplifier 42 to provide more precise feedback control for the comparators 12, 16.
Bridge Control Circuit And Method
Application
#5870266 Feb 9, 1999
Filed
Jun 6, 1996
Inventor
John K. Fogg (Durham, NC)
Appl. No.
8/656987
Assignee
Harris Corporation (Melbourne, FL)
International Classification
H02H 324
U.S. Classification
361 92
Abstract
A method and control circuit for an electronic switch, and more particularly the high side switch in a bridge circuit. Control is established by continuous and/or the combination of continuous and pulsed signals. Fail safe undervoltage protection is provided for the high side switch based on the adequacy of both high side and low side control voltages.
Switching Controller With Over Voltage Protection And Switching Converter And Method Thereof
Application
#2016017 Jun 16, 2016
Filed
Dec 10, 2014
Inventor
JohnFogg (Cary, NC)
Appl. No.
14/566598
Assignee
JohnFogg (Cary, NC)
International Classification
H02M 7/537, H02M 1/32
Abstract
A switching controller having an over voltage protection circuit is disclosed. The over voltage protection circuit detects whether the output voltage is higher than an over voltage threshold and turns on the rectifier when the output voltage is higher than an over voltage threshold. The over voltage protection circuit detects whether a current flowing through a rectifier is lower than a negative current limit and further turns off the rectifier for a time period when the current flowing through the rectifier is lower than the negative current limit. The off time period varies inversely with the input voltage.
The present disclosure presents a circuit, a method, and a system to drive a half-bridge switch using depletion (D) mode compound semiconductor (III-V) switching transistors for a DC-DC converter using at least one driver to drive the switches of the circuit. Also included is at least one charge pump electrically connected to a gate of the transistor, to maintain a voltage that holds the transistor in an off-state. The circuit includes AC coupling capacitors to level shift a voltage and realize fast transistor switching.
Switched Mode Power Supply Having Variable Minimum Switching Frequency
Application
#2009006 Mar 12, 2009
Filed
Nov 19, 2008
Inventor
John Kenneth Fogg (Cary, NC) ·
Yin-Chih Yang (Taipei, TW)
Appl. No.
12/274165
Assignee
Semtech Corporation (Morrisville, NC)
International Classification
G05F 1/00
U.S. Classification
323284
Abstract
In a switched mode power supply (SMPS) that regulates an output voltage in response to load conditions by switching an inductor circuit between a supply voltage and ground at a switching frequency, under light loading conditions, the switching frequency of the SMPS is reduced down to a variable minimum switching frequency sufficiently high to avoid audible noise generation.
Method And Apparatus For Reducing Inrush Current To A Voltage Regulating Circuit
A voltage regulating circuit, such as a voltage regulator or battery charger, limits inrush current by buffering an associated supply input decoupling capacitor through a current path that is selectively configured to have a high impedance for startup charging of the decoupling capacitor at a low current, and a low impedance for normal operations of the circuit. Where the circuit uses multiple supply input connections for operation from two or more supply voltages, it may include buffering for each one of two or more supply input connections. It may further include a crossover switching control circuit that ensures make-before-break switching between supply input connections to avoid supply interruptions to the circuit during switchover.